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Innovation is diversifying in the semiconductor chip industry, resulting in new approaches to meet the performance needs of advanced technologies like artificial intelligence. Non-traditional areas for innovation such as semiconductor packaging are playing a more crucial role in driving performance, power, connectivity and cost advancements for semiconductor manufacturers. And collaboration between traditionally distinct front-end and packaging domains is further accelerating these advances.

This diverse array of innovations and outcomes is driving much of the conversation at SEMICON Taiwan, which this year is built around the theme of “Breaking Limits: Powering the AI Era.” As part of the event, KLA is showcasing products and technologies designed to help customers across the semiconductor ecosystem solve advanced packaging challenges to unlock computing, latency and power advantages. 

Visitors to KLA’s booth learned how the company’s portfolio of products focus on solving a wide variety of customer challenges across semiconductor manufacturing. Scroll to bottom for more photos.

KLA Solutions Continue to Advance Packaging  

One of the keys to advanced packaging is heterogeneous integration, where multiple functions originating from different chip technologies are integrated together in a single package. Advancements in packaging manufacturing are bringing new process and process control challenges across wafer-level packaging, assembly and substrate manufacturing.  

Heterogeneous integration is introducing new architectures and integration flows, requiring process optimizations that have never been needed in packaging before. KLA’s wafer-level packaging process solutions will help customers achieve breakthroughs in packaging for chips targeting high-performance applications. 

SPTS Osprey® for Plasma-Enhanced Chemical Vapor Deposition (PECVD) 

The SPTS Osprey (on-wafer semiconductor packaging for reliability, extendibility and yield) is a new 300mm cluster platform that is designed to meet the needs of advanced 2.5D and 3D packaging applications. This system deposits high-quality, production-qualified dielectric films at temperatures as low as 125°C, with excellent stress and film thickness control that is critical to optimizing device yields.

Single wafer processing is known to give better performance than batch processing for within wafer (WiW) non-uniformity, wafer-to-wafer (WtW) non-uniformity, repeatability and chamber matching. The SPTS Osprey can be configured with a mix of up to six PECVD modules, each dedicated to a different application for R&D, or all dedicated for a single application in high-volume manufacturing.

Key Applications Include:

Via reveal passivation, with deposition of SiN+TEOS oxide bi-layer stack over the via tips after via reveal etching

TSV last liner, for deposition of SiN+TEOS oxide bi-layer via liner


Inter-die gap-fill,
 with known good die (KGD) bonded to a carrier and thick TEOS oxide deposited in between each die

SiCN for hybrid bonding, for direct D2W bonding, offering higher bond strength and Cu diffusion resistance than SIO

At the end of the assembly line, an advanced inspection and metrology strategy provides packaging manufacturers with the data required to improve their quality and yield while effectively sorting components so that defective parts are quickly removed (and potentially restored). For 2.5 and 3D multi-die packages, packaged chip inspection and metrology have become essential to ensuring device integrity.  

ICOS™ Tx90XP Series for Component Inspection and Metrology 

The ICOS™ Tx90XP Series of component inspectors offers multiple options for fully automated six-sided defect inspection of packaged integrated circuit components with tray or tape output, or the ICOS high-performance option with four independent inspection stations for high-throughput quality control of a wide variety of package types.

The new XP models deliver increased sensitivity to small defect types, paired with fast, accurate and repeatable 3D metrology measurements to offer enhanced detection of issues that affect final package quality, such as the examples illustrated at right.

KLA’s extensive portfolio of packaging solutions accelerates the manufacturing process and improves customer outcomes for a wide range of packaging applications. 

KLA’s Dr. Douglas Macfarlane (left), PECVD product manager, and Tarran Grange, etch manager, speak about via reveal processes in high-volume 300mm wafer-level packaging at SEMICON Taiwan’s Heterogeneous Integration Global Summit.     

A Few Snapshots from SEMICON Taiwan 2024

Rollin Kocher, KLA Taiwan country president, and other employees engage with visitors to SEMICON Taiwan 2024.
The busy floor of SEMICON Taiwan 2024 was packed with showgoers. Top photo: Meeting with customers was Rollin Kocher (right), president of KLA Taiwan, who says, “Taiwan is at the forefront of developing and delivering cutting-edge technology advancements. KLA is proud to partner with many of the leading technology innovators here in Taiwan.Below, customers engage with KLA employees and check out technology solutions.

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